PUBLICATIONS (last several years):

  • R. Hashemian, “Source Allocation Based on Design Criteria in Analog Circuits”, Proceedings of the 2010 IEEE International Midwest Symposium On Circuits And Systems, Seattle, WA, August 1 - 4, 2010.
  • R. Hashemian, “New Port Modeling for Analog Circuit Biasing Design”, 2010 IEEE International Conference on Electro/Information Technology EIT2010, Normal, IL, May 13 – 15, 2010.
  • Reza Hashemian, “Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits Designs,” VLSI Design, vol. 2010, Article ID 297083, 12 pages, 2010. doi:10.1155/2010/297083. http://www.hindawi.com/journals/vlsi/2010/297083.html
  • R. Hashemian, and Timothy Pearson, “A Low-Cost Server-Client Methodology for Remote Laboratory Access for Hardware Design” accepted for presentation, FIE2009, San Antonio, Texas, on October 18 – 21, 2009.
  • R. Hashemian, “Hybrid Equivalent Circuit, an Alternative to Thevenin and Norton Equivalents, Its Properties and Applications”, Proceedings of the 2009 IEEE International Midwest Symposium On Circuits And Systems, Cancun, Mexico, August 2 - 5, 2009.
  • R. Hashemian, "Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits ", Proceedings of the 2008 IEEE International Midwest Symposium On Circuits And Systems, Knoxville, TN, August 10 - 13, 2008.
  • R. Hashemian, “Use of Local Biasing in Designing Analog Integrated Circuits”, 2008 IEEE International Conference on Electro/Information Technology EIT2008, Ames, Iowa, May 18 – 20, 2008.
  • R. Hashemian, Jason Riddley, "A Method to Design, Construct and Test Digital Hardware all in Classroom Environment", Proceedings of the FIE2007 Conference, Milwaukee, Wisc., October 11 - 13, 2007.
  • R. Hashemian, "FPGA e-Lab, a Technique to Remoe Access a Laboratory to Design and Test", IEEE International Conference on Microelectronic System Education, San Diago, Ca., 3 – 4 June, 2007.
  • R. Hashemian, “A Linear-like Biasing Technique forNonlinear Circuits”, Proceedings of the International Conference on Integrated Circuit Design & Technology, Austin, Texas; May 30 – June 1, 2007.
  • R. Hashemian, “Partial Local Biasing, A New Method to Modify/Tune Amplifiers for a Desirable Performance”, 2007 IEEE International Conference on Electro/Information Technology, IIT, Chicago, May 17 – 19, 2007.
  • R. Hashemian, "Designing Analog Circuits with Reduced Biasing Power", Proceedings of the 13th IEEE International Conference on Electronics, Circuits and Systems, Nice, France Dec. 10– 13, 2006
  • R. Hashemian, "New Analysis and Design Technique for Analog Circuits ", Proceedings of the 2006 IEEE International Midwest Symposium On Circuits And Systems, San Juan, Puerto Rico, August 6 – 9, 2006.
  • R. Hashemian, "Analog Circuit Design with Linearized DC Biasing ", Proceedings of the 2006 IEEE International Conference on Electro/Information Technology, Michigan State University; Lancing ,MI, May 7– 10, 2006.
  • R. Hashemian, "Teaching an Introductory Engineering Course to Help Students to Better Select Their Majors", Proceedings of the FIE2005 Conference, Indianapolis, Indiana, October 19 - 22, 2005.
  • R. Hashemian, "Port Nullification, A Methodology To Simulate With Nonlinear Devices ", Proceedings of the 48th IEEE International Midwest Symposium On Circuits And Systems, Cincinnati, OH, August 7 – 10, 2005.
  • R. Hashemian, "Use of Conditional Additivity in Circuits with Exponential Nonlinearities", Proceedings of the 48th IEEE International Midwest Symposium On Circuits And Systems, Cincinnati, OH, August 7 – 10, 2005.
  • R. Hashemian and Chandi Pedapati " Blackboard-Based Digital Hardware Design Using FPGAs ", Proceedings of ASEE, 2005 IL/IN Sectional Conference, Section B-T3-4, April 1-2, 2005.
  • R. Hashemian " A Method to Teach an Introductory Engineering course ", Proceedings of ASEE, 2005 IL/IN Sectional Conference, Section C-T1-3, April 1-2, 2005.
  • R. Hashemian, " Condensed Table of Huffman Coding, A New Approach to Efficient Coding ", IEEE Trans. on Communications, Vol. 52, no. 1, pp 6 – 8, January 2004.
  • R. Hashemian, and Bipin Sereedharan" A Hybrid Number System and its Application in FPGA-DSP Teaching ", IEEE International Conference on Information Technology (ITCC 2004), at Las Vegas, Nevada, pp 342 – 346, April 5 – 7, 2004.
  • R. Hashemian, M. Sathya Marivada, " Improved Image Compression Using Fractal Block Coding ", Proceedings of the 46th IEEE International Midwest Symposium on Circuits and Systems, Cairo, Egypt, December 27 - 30, 2003.
  • R. Hashemian, " Direct Huffman Coding Using Table Of Code Lengths ", IEEE International Conference on Information Technology (ITCC 2003), at Las Vegas, Nevada, April 28 – 30, 2003.
  • R. Hashemian, et al, " A B-s Complement Continuous Valued Digit Adder ", IEEE International Symposium on Circuits and Systems (ISCAS 2002), at Fairmont Scottsdale, Scottsdale, AZ, May 25 – 29, 2002.
  • R. Hashemian, " CONDENCED HUFFMAN CODING, A NEW EFFICIENT DECODING TECHNIQUE ", Proceedings of the IEEE Midwest Symposium on Circuits and Systems (MWSCAS-45), Tulsa, OK, August 4 - 7, 2002.
  • R. Hashemian, M. Ahmadi, " Efficient Resource Allocation and Higher Speed for Image Decoders ", IEEE MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS 2001), at Dayton, Ohio, August 14 – 17, 2001.
  • R. Hashemian, et al, " Application of 2-D Filtering in Determination of the Velocity of Flow Fields ", IEEE Pacific Rim Conference on Communication Computers and Signal Processing (PACRIM 2001), at the University of Victoria, Victoria, B.C., August 26 – 28, 2001.
  • R. Hashemian, et al, " Design of High Throughput 2-D FIR Filters Using Singular Value Decomposition (SVD) and Genetic Algorithms ", IEEE Pacific Rim Conference on Communication Computers and Signal Processing (PACRIM 2001), at the University of Victoria, Victoria, B.C., August 26 – 28, 2001.
  • R. Hashemian, M. Ahmadi, " Reduced Code Transmission and High Speed Reconstruction of Huffman Tables ", IEEE Pacific Rim Conference on Communication Computers and Signal Processing (PACRIM 2001), at the University of Victoria, Victoria, B.C., August 26 – 28, 2001.
  • R. Hashemian, "A New Design for High Speed and High-Density Carry Select Adders", 43rd Midwest Symposium on Circuits and Systems, Lansing, Michigan, August 8-11, 2000.
  • R. Hashemian, S. Vijayaraghavan, and James Citta, "A Low Gate Image Encoder", 42nd Midwest Symposium on Circuits and Systems, New Mexico State University, Las Cruces, August 8-11, 1999.
  • R. Hashemian, Felipe Hernandez, and James Citta, "A New Algorithm and Design for a Low Gate Still Image Encoder", The 7th Annual Conference on Electrical Engineering, ICEE’99, May12-15, 1999.
  • R. Hashemian, "A New English to Persian Type-Script Conversion Package", The 3rd IAA Annual Conference "Computer and Communication", September 19-20, 1998.
  • R. Hashemian, and James Citta, "Design and Hardware Implementation of a New Image Encoder Using FPGA Technology", The 3rd IAA Annual Conference "Computer and Communication", September 19-20, 1998.
  • R. Hashemian, "Memory Efficient and High Speed Search Huffman Coding", IEEE Trans. on Communications, IECMBT, vol.43, no.10, pp.2576-2581, October, 1995.
  • R. Hashemian, "Design and Hardware Implementation of a Memory Efficient Huffman Decoding", IEEE Trans. on Consumer Electronics, vo.40, no.3, pp.345-352, August, 1994.
  • R. Hashemian, "Acoustic Noise Control System Design", The Fifth Iranian Conference on Electrical Engineering, Tehran, Iran, Mat 6-8, 1997
  • R. Hashemian, "Fast Addition Using a New Number", 30th Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, November 3-6, 1996.
  • R. Hashemian, "A New Number Method for Conversion of a 2’s Complement to Canonic Signed Digit Number System and its Representation", 30th Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, CA, November 3-6, 1996.
  • R. Hashemian, "A New Number System for Fast Multiplication", Midwest Symposium on Circuits and Systems, Ames, Iowa, August 18-21, 1996.
  • R. Hashemian, "Efficient Variable-Length Coding Under an Assigned Maximum Code-Length Constraint," IEEE International Symposium on Circuits and Systems (ISCAS 96), Atlanta, Georgia, May, 1996.
  • R. Hashemian, "Active Periodic Noise Control Using a Single FPGA Chip", IEEE International Conference on Consumer Electronics, ICCE'95, Chicago, Illinois, June 7-9, 1995.
  • R. Hashemian, "Design of an Active Noise Control System Using Combinations of DSP and FPGAs", PLDCon'95 Conference, Santa Clare, CA, April 25-27, 1995.
  • R. Hashemian, "DESIGN AND HARDWARE IMPLEMENTATION OF A MEMORY EFFICIENT HUFFMAN DECODING", IEEE Trans. on Consumer Electronics, Vol. 40, no. 3, pp 345 – 352, August, 1994.
  • R. Hashemian, "Fast Carry Adder Using FPGA Technology", 37th IEEE Midwest Symposium on Circuits and Systems, Lafayette, Louisiana, August 3-5, 1994.
  • R. Hashemian, "An Algorithm for the Design of a 54-bit Adder Using a Modified Manchester Carry Chain", Proceedings of the Forth Grate Lakes Symposium on VLSI, March 1994.
  • R. Hashemian, "Design and Hardware Construction of a High Speed and Memory Efficient Huffman Decoding", Proceedings of the IEEE/ICCE Conference, Chicago, IL, June 21-23, 1994.
  • R. Hashemian, K. Golla, S.M. Kuo, and A. Joshi, "Design and Construction of an Active Periodic Noise Canceling System Using FPGAs," 36th IEEE Midwest Symposium on Circuits and Systems, Detroit, MI, August 16-18, 1993.
  • R. Hashemian, "A New Algorithm to Construct Parallel Adder for High Density Codes," 36th IEEE Midwest Symposium on Circuits and Systems, Detroit, MI, August 16-18, 1993.
  • R. Hashemian, "A Speed-Area Efficient Algorithm for Huffman Decoding," ICEE'93 Iranian Conference on Electrical Engineering, Tehran, Iran, May 18-21, 1993.
  • R. Hashemian, "High Speed Search and Memory Efficient Huffman Coding," 1993 IEEE International Symposium on Circuits and Systems, Chicago Illinois, May 3-6 1993.